Multi-Version-Pulsating STM: A Multi-Version Optimistic Concurrency Control Scheme for Highly Parallel in-Memory Workload in a Multi Core Environments
Sana Jafar1, Ranjana Rajnish2, Pankaj Kumar3
1Sana Jafar*, Amity Institute of Information Technology, Amity University Uttar Pradesh, Lucknow Campus, Lucknow(India), India.
2Ranjana Rajnish, Amity Institute of Information Technology, Amity University Uttar Pradesh, Lucknow Campus, Lucknow(India), India.
3Pankaj Kumar, Department of Computer Science and Engineering, Sri Ram Swaroop College of Engineering and Management, Lucknow, India.
Manuscript received on September 22, 2019. | Revised Manuscript received on October 20, 2019. | Manuscript published on October 30, 2019. | PP: 1973-1979 | Volume-9 Issue-1, October 2019 | Retrieval Number: A9526109119/2019©BEIESP | DOI: 10.35940/ijeat.A9526.109119
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Abstract: Large in-memory data structures have a significant application in the fields of graphics, gaming, military and all the possible areas where Big Data can be employed. Their fame in the area of science and technology is attributable to fast in-memory access by the processor as compared to on-disk data structures. These enormous data structures can be accessed still fast and efficiently through parallel computing. For employing highly parallel computations, equally parallel algorithms are required. One of the most desirable attributes of such algorithms is their ability to control concurrency and avoid any deadlocks while being time and energy efficient. This paper presents a multi-version optimistic concurrency control algorithm based on timestamping. This algorithm is lock free and is tested on 64 simulated CPU cores on a multi core simulator. The algorithm is a Software Transactional Memory approach employing 16, 32, 40 and 50 threads in different tests running on the simulator. Half of the threads are doing reading and half are doing writing operation in each case while accessing an in-memory dynamic array. Being lock free and employing lazy timestamp calculations, this approach is better than other existing concurrency control approaches.
Keywords: Software Transactional Memory, Optimistic Concurrency Control, in-memory data structures, Timestamping, multi-version, sniper multi-core simulator, multi cores, Cycles Per Instructions