Modified Structure of Sepic Based Single-Phase Five-Level T-Type Inverter for Photovoltaic Applications
Arunprasath R1, Vijayakumar D2, Rathinakumar M3, Meikandasivam S4, Kirubakaran A5
1Arunprasath R*, Research Scholar, SCSVMV University, Kanchipuram, India.
2Vijayakumar D, School of Electrical Engineering, VIT University, Vellore, India.
3Meikandasivam S, School of Electrical Engineering, VIT University, Vellore, India.
4Rathinakumar M, Department of Electrical Engineering, SCSVMV University, Kanchipuram, India.
5Kirubakaran A, Department of Electrical Engineering, NIT Warangal, India.
Manuscript received on September 20, 2019. | Revised Manuscript received on October 15, 2019. | Manuscript published on October 30, 2019. | PP: 3852-3856 | Volume-9 Issue-1, October 2019 | Retrieval Number: A9843109119/2019©BEIESP | DOI: 10.35940/ijeat.A9843.109119
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: In this paper, a modified structure of two-stage sepic based five-level T-type inverter is presented for photovoltaic applications. The proposed topology consists of a frond-end sepic converter cascaded with full bridge T-type inverter through a high-frequency transformer. The proposed topology owns the merits of high boost output voltage level, modularity, reduced device parts, and better quality of supply. Therefore, a detailed operation of the proposed topology and the level generations using sine pulse width modulation are presented. Finally, the performance of the proposed topology is validated through Matlab simulation and experimental prototype model results.
Keywords: SEPIC inverter, Multilevel inverter, Field programmable gate array (FPGA), Total harmonic distortion (THD).