Elimination of Silent Data Corruption by Improved Error Detection using Difference Set Codes for Memories
S.Vaishnavi1, R.Karthika2, P.Suganya3
1Vaishnavi, Electronics and Communication Engineering, Avinashilingam Institute for Home Science and Higher Education for Women University, Coimbatore, India.
2Karthika, Computer Science Engineering, PPG Institute of Technology, Coimbatore, India.
3Suganya Electronics and Communication Engineering, Mohamed Sathak Engineering College, kilakarai, Ramanathapuram, India.
Manuscript received on January 26, 2013. | Revised Manuscript received on February 17, 2013. | Manuscript published on February 28, 2013. | PP: 111-114 | Volume-2 Issue-3, February 2013. | Retrieval Number: C1032022313 /2013©BEIESP
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Now-a-days, the memory devices are susceptible to Single Event Upsets (SEU) which is one of the soft errors due to radiation effects. Though several error correcting codes (ECC) are available, the simplest and effective ECC for memory application is Difference Set Cyclic Codes (DSCC). These codes are Majority logic decodable codes. This method of error correction will lead to Silent Data Corruption (SDC) in which the additional errors beyond the code’s correction capability are not detected. This SDC will provide faulty word after decoding which actually looks like error free corrected word. This is because the existing method assumes that the input word contains error which is less than the error correction capability and it tends to correct the additional errors, resulting in wrong output. The proposed algorithm will eliminate the SDC and detect the any number of additional errors. The proposed algorithm is coded in VHDL and simulated using Modelsim and Xilinx ISE simulator.
Keywords: Single Event Upsets (SEU), Error Correction Codes (ECC), Difference Set(DS) Codes, Majority logic decoding.