Double Security using Dynamic S-Box inside Aes Algorithm
Ashish Dwivedi1, Toushiba Khan2, S.R.P. Sinha3
1Ashish Dwivedi, Electronics and Communication Engineering Department, Institute of Engineering and Technology, Lucknow.
2Toushiba Khan, Electronics and Communication Engineering Department, Institute of Engineering and Technology, Lucknow.
3Dr. S.R.P. Sinha, Electronics and Communication Engineering Department, Institute of Engineering and Technology, Lucknow.
Manuscript received on July 20, 2019. | Revised Manuscript received on August 10, 2019. | Manuscript published on August 30, 2019. | PP: 1893-1898 | Volume-8 Issue-6, August 2019. | Retrieval Number: F7914088619/2019©BEIESP| DOI: 10.35940/ijeat.F7914.088619
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Now a days internet and other electronic devices have become an non removable part of our society. Day by day we are increasing the usage of data for transmission and storage as well. But there is always a problem for our data to be in wrong hands or hacked by someone. In order to ensure our secrecy of data we use bunch of algorithms to secure it. These algorithms comes under the vast section of cryptology, which means an art of hiding the data to make it secure. But as we all know when there is a hacker he would find every possible way to bypass the security algorithms. Some of the attacks are very popular in cryptology like Brute Force Attacks which checks each possible key combination to hack the data message. Due to the arrival of quantum computers in upcoming future hacking time will be decreased about a factor of around 1000 times. Now the best possible solution for enciphering data is Advanced Encryption Standard .This algorithm consists of two basic things static Substitution Box (S-Box) and other register operation. In this paper we have introduced a new technique to ensure a secure communication by using a dynamic S-Box with avalanche value of 58.59% as well as we also improved the overall area, delay (1.227 ns) and optimized the power to possible extents. Our results also approached above the traditional AES security as our modification improves avalanche effect also.
Keywords: Avalanche, FPGA, AES, cipher, pipeline, ISIM, ISE Xilinx, throughput, delay, wave, CBC mode.