Power and Delay Estimation of universal and Exclusive gates using Static and Dynamic CMOS Design
Surya A
Surya A,Assistant professor, Department of Electronics and communication Engineering in Anjalai Ammal Mahalingam Engineering College.
Manuscript received on July 20, 2019. | Revised Manuscript received on August 10, 2019. | Manuscript published on August 30, 2019. | PP: 2438-2441 | Volume-8 Issue-6, August 2019. | Retrieval Number: F8538088619/2019©BEIESP | DOI: 10.35940/ijeat.F8538.088619
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: In this paper, designing the universal gate and exclusive gates using static, pseudo nmos and dynamic cmos design and calculate the power and delay by using microwind simulator. We can implement any Boolean functions as well as basic gate using universal gates NAND and NOR .exclusive gate XOR and XNOR are used for error detection and correction in digital communication circuits.
Keywords: NAND, NOR, XOR, XNOR, Power, Delay ,microwind