Design and Performance Improvement of CNTFET Based Content Addressable Memory (CAM) Cells
Raju Hajare1, Mallikarjunagowda C. P2, Deekshitha3, Madhuri. J, Ananya4
1Raju Hajare*, Department of Electronics and Telecommunication Engineering, BMS Institute of Technology and Management, Bangalore, India.
2Mallikarjunagowda. C.P, Department of Electronics and Telecommunication Engineering, BMS Institute of Technology and Management, Bangalore, India.
Manuscript received on September 22, 2019. | Revised Manuscript received on October 20, 2019. | Manuscript published on October 30, 2019. | PP: 1694-1698 | Volume-9 Issue-1, October 2019 | Retrieval Number: F8904088619/2019©BEIESP | DOI: 10.35940/ijeat.F8904.109119
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: The scaling down of transistors is of paramount importance to make ICs and devices more portable and efficient. As it is the most basic component of every electronic device, there is need of finding better and innovative methods of transistor characterization. CNTFET has shown the promise and is best suited for today’s faster digital processing units and Memory devices. Here Carbon Nano Tube (CNT) is characterized for its electrical property and then designed a XOR based CAM cell using CNTFET. Both delay and power analysis for the designed CAM is done.
Keywords: Carbon Nano Tube FET (CNTFET), Content Addressable Memory (CAM) Cell, SRAM, MOSFET.